A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain by Ricardo Filipe Sereno Póvoa & João Carlos da Palma Goes & Nuno Cavaco Gomes Horta

Author:Ricardo Filipe Sereno Póvoa & João Carlos da Palma Goes & Nuno Cavaco Gomes Horta
Language: eng
Format: epub
ISBN: 9783319952079
Publisher: Springer International Publishing

In order to further increase the low-frequency gain without the need of any cascode devices, the two highlighted PMOS transistors in latch configuration, composed by the P2 pair, are added in parallel with the active loads and sized with approximately 75% of the aspect ratio of the active loads P1a and P1b, respectively. The dynamic biasing is controlled by three SC branches, comprising capacitors C 1, C 2a, and C 2b, which are charged during the amplification phase Ø2 and partially discharged during the reset phase Ø1. This way, the OTA starts slewing with a peak current , i.e., maximum GBW and peak slew-rate , and reaches the peak gm/I ratio, i.e., finite gain, in the end of phase Ø2. The gain of a single-ended VC block in a continuous-time domain is in (3.34). The gain of the differential pair considering the cross-coupled load is shown in (3.35). Considering that gdsN0 is sufficiently small when compared to gdsP2, a good approximation for the gain expression is given by (3.36). The body effect of the devices is neglected.

The gain of the amplifier is, as described in (3.34), directly proportional to the output conductance of the cross-coupled structure and inversely proportional to the square value of the latter. If a higher transconductance of P2 is delivered, the gain is also enhanced through the implementation of the auxiliary latch structure. A dynamically biased OTA is often designed firsthand, considering a continuous-time analysis domain, and afterward the implementation of the SC structures is carried out. Indeed, the sizing of the SC biasing branches relies on the static current consumption of active current sources, using (3.37), where R EQ is the equivalent resistance of an active current source for a given sampling clock frequency . In the case of the work presented, a nominal frequency of 100 MHz is considered. The design of the OTA proposed in this section is first carried out in a continuous-time domain, targeting high gain and energy efficiency , by means of FOM as defined in (2.​14). However, the operation of a dynamic OTA is inserted in a discrete-time context. Therefore, the expression in (2.​14) must be modified into (3.38). The performance of the OTA proposed in this section is, consequently, evaluated in the terms of the FOM given by (3.38).

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